Publikációk
Szűrők: Az Utónév Első Betűje = M [Minden szűrő visszaállítása]
"Watchdog Processors in Parallel Systems",
MICROPROCESSING AND MICROPROGRAMMING, vol. 39, issue 2-5, pp. 69 - 74, 1993.
Abstract
"Hierarchical Checking of Multiprocessors Using Watchdog Processors",
Dependable Computing - EDCC-1, Berlin ; Heidelberg, Springer-Verlag, pp. 386 - 403, 1994.
"A High-Speed Watchdog Processor for Multitasking Systems",
Proc. Eighth Symposium on Microcomputer and Microprocessor Applications (uP'94): HTE, pp. 65 - 74, 1994.
"Többprocesszoros rendszerek ellenőrzése watchdog processzorok felhasználásával",
XIV. Tudományos Ülésszak, Kandó Kálmán Műszaki Főiskola, pp. - , 1994.
"Control Flow Checking in Multitasking Systems",
PERIODICA POLYTECHNICA-ELECTRICAL ENGINEERING, vol. 39, issue 1, pp. 27 - 36, 1995.
"Multiprocessor Checking Using Watchdog Processors",
COMPUTER SYSTEMS SCIENCE AND ENGINEERING, vol. 11, issue 5, pp. 301 - 310, 1996.
Abstract
"Software Diagnosis Using Compressed Signature Sequences",
PERIODICA POLYTECHNICA-ELECTRICAL ENGINEERING, vol. 40, issue 2, pp. 87 - 103, 1996.
"Reachability and Timing Analysis in Data Flow Networks: A Case Study",
Proceedings of the 22nd EUROMICRO Conference: IEEE Computer Society Press, pp. 193 - 200, 1996.
"Software Monitoring and Debugging Using Compressed Signature Sequences",
Proceedings of the 22nd EUROMICRO Conference: IEEE Computer Society Press, pp. 311 - 318, 1996.
Concurrent Error Detection in Multiprocessor Systems using Watchdog Processors,
: Budapest University of Technology, 1997.
"Temporal analysis of data flow control systems",
AUTOMATICA, vol. 34, issue 2, pp. 169 - 182, 1998.
Abstract
"Automatic Dependability Modeling of Systems Described in UML",
Proc. 9th International Symposium on Software Reliability Engineering (ISSRE'98), pp. 29 - 30, 1998.
"Hardware Accelerators for Petri-net Analysis",
Proc. Austrian-Hungarian Workshop on Distributed and Parallel Systems (DAPSYS'98): University of Vienna, Department of Applied Computer Science, pp. 99 - 104, 1998.
"Reachability Analysis of Petri-nets by FPGA Based Accelerators",
Proc. Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS'98), pp. 307 - 312, 1998.
"Towards a Formal Operational Semantics of UML Statechart Diagrams",
Formal Methods for Open Object-Based Distributed Systems (Proc. Third IFIP International Conference on Formal Methods for Open Object-based Distributed Systems (FMOODS'99), February 15-18, 1999, Florence, Italy), Deventer, Kluwer Academic Publishers, pp. 331 - 347, 1999.
"Automatic Verification of a Behavioural Subset of UML Statechart Diagrams Using the SPIN Model-checker",
FORMAL ASPECTS OF COMPUTING, vol. 11, issue 6, pp. 637 - 664, 1999.
"Backward error recovery in the APEmille parallel computer",
Proc. of the 3rd European Dependable Computing Conf., Prague, Czech Republic, Lecture Notes in Computer Science. Springer Berlin, 1999.
"Automated Dependability Analysis of UML Designs",
Proc. 2nd IEEE International Symposium on Object-oriented Real-time Distributed Computing (ISORC'99), pp. 139 - 144, 1999.
"Automatic Dependability Analysis for Supporting Design Decisions in UML",
Proc. Fourth IEEE International Symposium on High-Assurance Systems Engineering (HASE'99), Washington, pp. 64 - 71, 1999.
"Concurrent Error Detection of Program Execution Based on Statechart Specification",
Proc. 10th European Workshop on Dependable Computing (EWDC-10): Österreichische Computer Gesellschaft, pp. 181 - 185, 1999.
"Formal Verification of Fault Tolerance Techniques in UML",
Dependable Computing - EDCC-3, Fast Abstracts: Czech Technical University, pp. 19 - 20, 1999.
"Completeness and Consistency Analysis of UML Statechart Specifications",
11th European Workshop on Dependable Computing (EWDC-11), Budapest, pp. 6 - , 2000.
"Formal Validation of UML Statechart Diagrams Models",
UML2000 Workshop on Dynamic Behaviour in UML Models: Semantic Questions (The Third International Conference on The Unified Modeling Language), pp. * - 7, 2000.
"Quantitative Analysis of Dependability Critical Systems Based on UML Statechart Models",
Proc. Fifth IEEE Int. Symposium on High Assurance Systems Engineering, (HASE 2000), Los Alamitos, IEEE Computer Society Press, pp. 83 - 92, 2000.
"Visual Graph Transformation in System Verification",
DDECS 2000 International IEEE Workshop on the Design and Diagnostics of Electronic Circuits and Systems, Bratislava, Slovakia, pp. 137–141, April 5–7, 2000.
Abstract