Publications

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2001
Pap, Z., Majzik, I., Pataricza, A., and Szegi, A., "Completeness and Consistency Analysis of UML Statechart Specifications", Proc. IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS 2001): SZIF-Universitas, pp. 83 - 90, 2001.
Polgár, B., Nováki, S., Pataricza, A., and Friedler, F., "A Process Graph Based Formulation of The Syndrome-decoding Problem", Proc. IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS 2001): SZIF-Universitas, pp. 267 - 272, 2001.
2000
Bartha, T., and Selényi, E., "Probabilistic fault diagnosis in large, heterogeneous computing systems", Periodica Polytechnica-Electrical Engineering, vol. 2, issue 2, pp. 127 - 149, 2000.
Pap, Z., Majzik, I., Pataricza, A., and Szegi, A., "Completeness and Consistency Analysis of UML Statechart Specifications", 11th European Workshop on Dependable Computing (EWDC-11), Budapest, pp. 6 - , 2000.
Huszerl, G., and Kosmidis, K., "UML - Extensions for Quantitative Analysis", Proc. of UML 2000 Workshop: Dynamic Behaviour in UML Models: Semantic Questions, München, LMU-München, Institut für Informatik, pp. 70 - 75, 2000.
Gáspár, P., Szászi, I., Bartha, T., Varga, I., Bokor, J., Palkovics, L., and Gianone, L., "Visual lane and obstruction detection system for commercial vehicles", 4th IFAC symposium on fault detection supervision and safety for technical processes. SAFEPROCESS 2000. Preprints, Budapest, vol. 2: IFAC, pp. 908–913, 06.14–06.16., 2000.
1999
Majzik, I., Jávorszky, J., Pataricza, A., and Selényi, E., "Concurrent Error Detection of Program Execution Based on Statechart Specification", Proc. 10th European Workshop on Dependable Computing (EWDC-10): Österreichische Computer Gesellschaft, pp. 181 - 185, 1999.
1998
Bernardeschi, C., Bondavalli, A., Csertán, G., Majzik, I., and Simoncini, L., "Temporal analysis of data flow control systems", AUTOMATICA, vol. 34, issue 2, pp. 169 - 182, 1998. Abstract
1997
Bartha, T., and Selényi, E., "Probabilistic System-Level Fault Diagnostic Algorithms for Multiprocessors", Parallel Computing, vol. 22, pp. 1807 - 1821, 1997. Abstract
UT: A1997WM04500008L3: citeulike-article-id:3911659KW: system-level diagnosis ISSN 0167-8191 Special issue: distributed and parallel systems: environments and tools
1996
Majzik, I., Hohl, W., Pataricza, A., and Sieh, V., "Multiprocessor Checking Using Watchdog Processors", COMPUTER SYSTEMS SCIENCE AND ENGINEERING, vol. 11, issue 5, pp. 301 - 310, 1996. Abstract
Antal, B., Bondavalli, A., Csertán, G., Majzik, I., and Simoncini, L., "Reachability and Timing Analysis in Data Flow Networks: A Case Study", Proceedings of the 22nd EUROMICRO Conference: IEEE Computer Society Press, pp. 193 - 200, 1996.
1994
Majzik, I., Pataricza, A., Dal Cin, M., Hohl, W., Hönig, J., and Sieh, V., "Hierarchical Checking of Multiprocessors Using Watchdog Processors", Dependable Computing - EDCC-1, Berlin ; Heidelberg, Springer-Verlag, pp. 386 - 403, 1994.
Majzik, I., Pataricza, A., Hohl, W., Hönig, J., and Sieh, V., "A High-Speed Watchdog Processor for Multitasking Systems", Proc. Eighth Symposium on Microcomputer and Microprocessor Applications (uP'94): HTE, pp. 65 - 74, 1994.

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