Publications

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2002
Darvas, Á., Majzik, I., and Benyó, B., "Verification of UML Statechart Models of Embedded Systems", Proc. IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS 2002): Brno University of Technology, pp. 70 - 77, 2002.
2001
Pap, Z., Majzik, I., Pataricza, A., and Szegi, A., "Completeness and Consistency Analysis of UML Statechart Specifications", Proc. IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS 2001): SZIF-Universitas, pp. 83 - 90, 2001.
Polgár, B., Nováki, S., Pataricza, A., and Friedler, F., "A Process Graph Based Formulation of The Syndrome-decoding Problem", Proc. IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS 2001): SZIF-Universitas, pp. 267 - 272, 2001.