András Pataricza
An XML Schema Description of Graph Transformation Systems,
: Budapest University of Technology and Economics, Department of Measurement and Information Systems, January, 2001.
Abstract
"Designing the Automatic Transformation of Visual Languages",
GRATRA 2000 Joint {APPLIGRAPH} and {GETGRATS} Workshop on Graph Transformation Systems, Berlin, Germany, pp. 14–21, March 25–27, 2000.
Abstract
"Visual Graph Transformation in System Verification",
DDECS 2000 International IEEE Workshop on the Design and Diagnostics of Electronic Circuits and Systems, Bratislava, Slovakia, pp. 137–141, April 5–7, 2000.
Abstract
"Completeness and Consistency Analysis of UML Statechart Specifications",
11th European Workshop on Dependable Computing (EWDC-11), Budapest, pp. 6 - , 2000.
Towards an XMI–Based Model Interchange Format for Graph Transformation Systems,
: Budapest University of Technology and Economics, Department of Measurement and Information Systems, September, 2000.
Abstract
UML Specification of Model Transformation Systems,
: Budapest University of Technology and Economics, Department of Measurement and Information Systems, October, 2000.
Abstract
Mathematical Model Transformation for System Verification,
: Budapest University of Technology and Economics, Dept. of Measurement and Information Systems, June, 2000.
Abstract
"Concurrent Error Detection of Program Execution Based on Statechart Specification",
Proc. 10th European Workshop on Dependable Computing (EWDC-10): Österreichische Computer Gesellschaft, pp. 181 - 185, 1999.
"Hardware Accelerators for Petri-net Analysis",
Proc. Austrian-Hungarian Workshop on Distributed and Parallel Systems (DAPSYS'98): University of Vienna, Department of Applied Computer Science, pp. 99 - 104, 1998.
"Reachability Analysis of Petri-nets by FPGA Based Accelerators",
Proc. Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS'98), pp. 307 - 312, 1998.
"Multiprocessor Checking Using Watchdog Processors",
COMPUTER SYSTEMS SCIENCE AND ENGINEERING, vol. 11, issue 5, pp. 301 - 310, 1996.
Abstract
"Control Flow Checking in Multitasking Systems",
PERIODICA POLYTECHNICA-ELECTRICAL ENGINEERING, vol. 39, issue 1, pp. 27 - 36, 1995.
"Hierarchical Checking of Multiprocessors Using Watchdog Processors",
Dependable Computing - EDCC-1, Berlin ; Heidelberg, Springer-Verlag, pp. 386 - 403, 1994.
"A High-Speed Watchdog Processor for Multitasking Systems",
Proc. Eighth Symposium on Microcomputer and Microprocessor Applications (uP'94): HTE, pp. 65 - 74, 1994.
"Többprocesszoros rendszerek ellenőrzése watchdog processzorok felhasználásával",
XIV. Tudományos Ülésszak, Kandó Kálmán Műszaki Főiskola, pp. - , 1994.
"Watchdog Processors in Parallel Systems",
MICROPROCESSING AND MICROPROGRAMMING, vol. 39, issue 2-5, pp. 69 - 74, 1993.
Abstract
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