Darvas Dániel

2018
Vörös, A., Darvas, D., Hajdu, Á., Klenik, A., Marussy, K., Molnár, V., Bartha, T., and Majzik, I., "Industrial applications of the PetriDotNet modelling and analysis tool", Science of Computer Programming, vol. 157, pp. 17-40, 2018. Abstract
2017
Darvas, D., Majzik, I., and Blanco Viñuela, E., "PLC Program Translation for Verification Purposes", Periodica Polytechnica, Electrical Engineering and Computer Science, vol. 61, issue 2, pp. 151–165, 05/2017. Abstract
Darvas, D., Majzik, I., and Blanco Viñuela, E., "Well-Formedness and Invariant Checking of PLCspecif Specifications", Proceedings of the 24th PhD Mini-Symposium: Budapest University of Technology and Economics, Department of Measurement and Information Systems, pp. 10-13, 2017.
2016
Darvas, D., Majzik, I., and Blanco Viñuela, E., "Formal Verification of Safety PLC Based Control Software", Integrated Formal Methods, vol. 9681: Springer, pp. 508-522, 2016.
Vörös, A., Darvas, D., Molnár, V., Klenik, A., Hajdu, Á., Jámbor, A., Bartha, T., and Majzik, I., "PetriDotNet 1.5: Extensible Petri Net Editor and Analyser for Education and Research", Application and Theory of Petri Nets and Concurrency, vol. 9698: Springer, pp. 123-132, 2016. Abstract
Darvas, D., Vörös, A., and Bartha, T., "Improving Saturation-based Bounded Model Checking", Acta Cybernetica, vol. 22, issue 3, no. 3, pp. 573-589, 2016.
Molnár, V., Vörös, A., Darvas, D., Bartha, T., and Majzik, I., "Component-wise Incremental LTL Model Checking", Formal Aspects of Computing, vol. 28, issue 3: Springer, pp. 345-379, 05/2016.
Darvas, D., Blanco Viñuela, E., and Majzik, I., "PLC Code Generation Based on a Formal Specification Language", 14th IEEE International Conference on Industrial Informatics (INDIN), Poitiers, France, IEEE, pp. 389-396, 07/2016.
Darvas, D., Majzik, I., and Blanco Viñuela, E., "Conformance Checking for Programmable Logic Controller Programs and Specifications", 11th IEEE International Symposium on Industrial Embedded Systems (SIES), Kraków, Poland, IEEE, pp. 29-36, 05/2016.
Darvas, D., Majzik, I., and Blanco Viñuela, E., "Generic Representation of PLC Programming Languages for Formal Verification", Proceedings of the 23rd PhD Mini-Symposium: Budapest University of Technology and Economics, Department of Measurement and Information Systems, pp. 6-9, 2016.
2015
Molnár, V., Darvas, D., Vörös, A., and Bartha, T., "Saturation-based Incremental LTL Model Checking with Inductive Proofs", Tools and Algorithms for the Construction and Analysis of Systems, vol. 9035: Springer, pp. 643-657, 2015.
Fernández Adiego, B., Darvas, D., Blanco Viñuela, E., Tournier, J-C., Bliudze, S., Blech, J O., and González Suárez, V. M., "Applying Model Checking to Industrial-Sized PLC Programs", IEEE Transactions on Industrial Informatics, vol. 11, issue 6: IEEE, pp. 1400-1410, 12/2015.
Darvas, D., Blanco Viñuela, E., and Majzik, I., "A formal specification method for PLC-based applications", Proceedings of the 15th International Conference on Accelerator and Large Experimental Physics Control Systems, Melbourne, Australia, JACoW, pp. 907-910, 10/2015.
Darvas, D., Fernández Adiego, B., and Blanco Viñuela, E., "PLCverif: A tool to verify PLC programs based on model checking techniques", Proceedings of the 15th International Conference on Accelerator and Large Experimental Physics Control Systems, Melbourne, Australia, JACoW, pp. 911-914, 10/2015.
Darvas, D., Majzik, I., and Blanco Viñuela, E., "Requirements towards a formal specification language for PLCs", Proceedings of the 22nd PhD Mini-Symposium, Budapest, Hungary, Budapest University of Technology and Economics, Department of Measurement and Information Systems, pp. 18-21, 02/2015.
2014
Darvas, D., Fernández Adiego, B., Vörös, A., Bartha, T., Blanco Viñuela, E., and González Suárez, V. M., "Formal verification of complex properties on PLC programs", Formal Techniques for Distributed Objects, Components, and Systems, vol. 8461: Springer, pp. 284-299, 2014.
Vörös, A., Darvas, D., Jámbor, A., and Bartha, T., "Advanced Saturation-based Model Checking of Well-formed Coloured Petri Nets", Periodica Polytechnica, Electrical Engineering and Computer Science, vol. 58, no. 1, pp. 11, 2014.
Fernández Adiego, B., Darvas, D., Blanco Viñuela, E., Tournier, J-C., González Suárez, V. M., and Blech, J O., "Modelling and Formal Verification of Timing Aspects in Large PLC Programs", Proceedings of the 19th IFAC World Congress 2014, pp. 3333-3339, 08/2014.
Fernández Adiego, B., Darvas, D., Tournier, J-C., Blanco Viñuela, E., and González Suárez, V. M., "Bringing Automated Model Checking to PLC Program Development – A CERN Case Study", Proceedings of the 12th International Workshop on Discrete Event Systems, Paris, France, International Federation of Automatic Control, pp. 394-399, 05/2014.
Darvas, D., Incremental extension of the saturation algorithm-based bounded model checking of Petri nets, , vol. MSc: Budapest University of Technology and Economics, pp. 127, 05/2014.
Fernández Adiego, B., Darvas, D., Tournier, J-C., Blanco Viñuela, E., Blech, J O., and González Suárez, V. M., Automated Generation of Formal Models from ST Control Programs for Verification Purposes, , no. CERN-ACC-NOTE-2014-0037: CERN, 2014.
2013
Vörös, A., Darvas, D., and Bartha, T., "Bounded saturation-based CTL model checking", Proceedings of the Estonian Academy of Sciences, vol. 62, issue 1, pp. 12, 03/2013.
Darvas, D., Vörös, A., and Bartha, T., "Efficient Saturation-based Bounded Model Checking of Asynchronous Systems", 13th Symposium on Programming Languages and Software Tools (SPLST'13), Szeged, Hungary, University of Szeged, pp. 259–273, 08/2013.
Darvas, D., and Vörös, A., "Szaturációalapú tesztbemenet-generálás színezett Petri-hálókkal", Mesterpróba 2013. Konferenciakiadvány, pp. 48-51, 05/2013.
Darvas, D., Fernández Adiego, B., and Blanco Viñuela, E., Transforming PLC programs into formal models for verification purposes, , no. CERN-ACC-NOTE-2013-0040: CERN, 2013.

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