Functional test generation and diagnosis (FUTEG)

1997
1997

Sponsors:

EC PECO Project #9624

Period:

1997

Participants:

In this project four research teams from Central and Eastern Europe working in the field of test generation and diagnosis of electronic devices will co-operate with two research teams of the EC.
The partners of this project are:
  • Prof. Raimund Ubar, Tallinn Technical University, Estonia
  • Prof. Rimantas Seinauskas, Kaunas University of Technology, Lithuania
  • Dr. Elena Gramatová, Institute of Computer Systems, Bratislava, Slovakia
  • Dr. András Pataricza, Technical University of Budapest, Hungary
  • Dr. Meryem Marzouki, INPG / TIMA, Grenoble, France
  • Dr. Bernd Straube (Coordinator), FhG IIS / EAS, Dresden, Germany

Project aim:

The use of VHDL as a high-level hardware description language for simulation, synthesis, and test generation for circuits or systems to be applied in computers, telecommunication, mechatronics, measurement, etc has become a standard. Only testing and fault diagnosis can make sure to produce fault-free devices. However, testing and diagnosis have great problems in managing the complexity of a designed system. One promising way to overcome these problems consists in involving functional aspects at the system level rather than structural ones at the gate level only. Then it will become possible for system level VHDL descriptions to be used to check and improve the testability at system level and to be the basis for the generation of tests for validation and fault diagnosis.

Published results:

B. Sallay, A. Petri, K. Tilly, A. Pataricza, J. Sziray: High Level Test Pattern Generation for VHDL Circuits. Proceedings of the IEEE European Test Workshop '96, June 1996, Montpellier, France.

B. Sallay: Heuristic Type-Uninterpreted Acceleration of High Level Systematic Test Pattern Generation. Proceedings of the IEEE European Test Workshop '97, May 1997, Cagliari, Italy.

B. Sallay: Heuristic Control in the Type-Uninterpreted Dynamic Analysis Phase of Architectural Test Pattern Generation. Proceedings of the 9th European Workshop on Dependable Computing, May 1998, Gdansk, Poland.

A. Petri, A. Pataricza: Application of Statistical Methods for Enhancing Automatic Test Pattern Generation. Proceedings of the 9th European Workshop on Dependable Computing, May 1998, Gdansk, Poland.

Further information:

András Pataricza, Ph.D.