Publications
]
"A Resilient SIL 2 Driver Machine Interface for Train Control Systems",
Proc. 3rd International Conference on Dependability of Computer Systems (DepCoS - RELCOMEX), pp. 365 - 374, 2008.
"Property-Based Methods for Collaborative Model Development",
3rd International Workshop on the Globalization Of Modeling Languages and the 9th International Workshop on Multi-Paradigm Modeling co-located with ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems, Ottawa,Canada, 2015/09.
MIDDLEWARE TO AUTOMATICALLY VERIFY SMART CONTRACTS ON BLOCKCHAINS,
, no. 16/227,728, United States, 06/2020.
Abstract
US Patent Application
"VIATRA: Visual Automated Transformations for Formal Verification and Validation of UML Models",
Proc. ASE 2002: 17th IEEE International Conference on Automated Software Engineering, Edinburgh, UK, IEEE Press, pp. 267–270, September 23–27, 2002.
Abstract
Acceptance rate = 20%
"Hardware Accelerators for Petri-net Analysis",
Proc. Austrian-Hungarian Workshop on Distributed and Parallel Systems (DAPSYS'98): University of Vienna, Department of Applied Computer Science, pp. 99 - 104, 1998.
"Reachability Analysis of Petri-nets by FPGA Based Accelerators",
Proc. Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS'98), pp. 307 - 312, 1998.
"Model-Driven Development of Heterogeneous Cyber-Physical Systems",
Proceedings of the 28th PhD Mini-Symposium, Budapest, Hungary, Budapest University of Technology and Economics, Department of Measurement and Information Systems, pp. 24-27, 2021.
Abstract
"Exploiting Hierarchy in the Abstraction-Based Verification of Statecharts Using SMT Solvers",
Proceedings of the 14th International Workshop on Formal Engineering Approaches to Software Components and Architectures, vol. 245: Open Publishing Association, pp. 31–45, 2017.
Abstract
"Quantitative Evaluation of Dependability Critical Systems Based on Guarded Statechart Models",
Proc. Fourth IEEE Int. Symposium on High Assurance Systems Engineering (HASE'99): IEEE Computer Society Press, pp. 37 - 45, 1999.
"Towards Testing the Implementation of Graph Transformations",
Proc. of the Fifth International Workshop on Graph Transformation and Visual Modelling Techniques: Elsevier, 2006.
Abstract
"Requirements towards a formal specification language for PLCs",
Proceedings of the 22nd PhD Mini-Symposium, Budapest, Hungary, Budapest University of Technology and Economics, Department of Measurement and Information Systems, pp. 18-21, 02/2015.
"Formal Verification of Safety PLC Based Control Software",
Integrated Formal Methods, vol. 9681: Springer, pp. 508-522, 2016.
"Verification of UML Statechart Models of Embedded Systems",
Proc. IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS 2002): Brno University of Technology, pp. 70 - 77, 2002.
"Improving Saturation-based Bounded Model Checking",
Acta Cybernetica, vol. 22, issue 3, no. 3, pp. 573-589, 2016.
"PLCverif: A tool to verify PLC programs based on model checking techniques",
Proceedings of the 15th International Conference on Accelerator and Large Experimental Physics Control Systems, Melbourne, Australia, JACoW, pp. 911-914, 10/2015.
"Szaturációalapú tesztbemenet-generálás színezett Petri-hálókkal",
Mesterpróba 2013. Konferenciakiadvány, pp. 48-51, 05/2013.
"Formal verification of complex properties on PLC programs",
Formal Techniques for Distributed Objects, Components, and Systems, vol. 8461: Springer, pp. 284-299, 2014.
"Generic Representation of PLC Programming Languages for Formal Verification",
Proceedings of the 23rd PhD Mini-Symposium: Budapest University of Technology and Economics, Department of Measurement and Information Systems, pp. 6-9, 2016.
"A formal specification method for PLC-based applications",
Proceedings of the 15th International Conference on Accelerator and Large Experimental Physics Control Systems, Melbourne, Australia, JACoW, pp. 907-910, 10/2015.
"PLC Program Translation for Verification Purposes",
Periodica Polytechnica, Electrical Engineering and Computer Science, vol. 61, issue 2, pp. 151–165, 05/2017.
Abstract
Incremental extension of the saturation algorithm-based bounded model checking of Petri nets,
, vol. MSc: Budapest University of Technology and Economics, pp. 127, 05/2014.
Transforming PLC programs into formal models for verification purposes,
, no. CERN-ACC-NOTE-2013-0040: CERN, 2013.
"Conformance Checking for Programmable Logic Controller Programs and Specifications",
11th IEEE International Symposium on Industrial Embedded Systems (SIES), Kraków, Poland, IEEE, pp. 29-36, 05/2016.
"Efficient Saturation-based Bounded Model Checking of Asynchronous Systems",
13th Symposium on Programming Languages and Software Tools (SPLST'13), Szeged, Hungary, University of Szeged, pp. 259–273, 08/2013.
"Szaturáció alapú korlátos modellellenőrzési technikák Petri-hálók analízisére",
XVII. Fiatal Műszakiak Tudományos Ülésszaka, Cluj Napoca, Romania, Erdélyi Múzeum-Egyesület Műszaki Tudományok Szakosztálya, pp. 83-86, 2012.
