Contains the keyword formal verification

Darvas D, Majzik I, Blanco Viñuela E. PLC Program Translation for Verification Purposes. Periodica Polytechnica, Electrical Engineering and Computer Science. 2017;61(2):151-65. Abstract
Varró D, Gyapay S, Pataricza A. Automatic Transformation of {UML} Models for System Verification. In: Whittle J, editor. WTUML'01: Workshop on Transformations in UML. Genova, Italy; 2001. p. 123-7. Abstract
Varró D, Varró G, Pataricza A. Visual Graph Transformation in System Verification. In: Gramatova E, Manhaeve H, Pawlak A, editors. DDECS 2000 International IEEE Workshop on the Design and Diagnostics of Electronic Circuits and Systems. Bratislava, Slovakia; 2000. p. 137-41. Abstract
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